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 TS615
DUAL WIDE BAND OPERATIONAL AMPLIFIER WITH HIGH OUTPUT CURRENT
s LOW NOISE : 2.5nV/Hz s HIGH OUTPUT CURRENT : 420mA s VERY LOW HARMONIC AND INTERMODULATION DISTORTION
s HIGH SLEW RATE : 410V/s s -3dB BANDWIDTH : 40MHz@gain=12dB on
25 load single ended.
s 21.2Vp-p DIFFERENTIAL OUTPUT SWING
on 50 load, 12V power supply
s CURRENT FEEDBACK STRUCTURE s 5V to 12V POWER SUPPLY s SPECIFIED FOR 20 and 50 DIFFERENTIAL LOAD
P TSSOP14 Exposed-Pad (Plastic Micro package)
s POWER DOWN FUNCTION WITH A SHORT
CIRCUITED OUTPUT to keep the matching with the line in sleep mode DESCRIPTION The TS615 is a dual operational amplifier featuring a high output current 410mA. These drivers can be configured differentially for driving signals in telecommunication systems using multiple carriers. The TS615 is ideally suited for xDSL (High Speed Asymmetrical Digital Subscriber Line) applications. This circuit is capable of driving a 10 or 25 load at 2.5V, 5V, 6V or +12V power supply. The TS615 will be able to reach a -3dB bandwidth of 40MHz on 25 load with a 12dB gain. This device is designed for the high slew rates to support low harmonic distortion and intermodulation. The TS615 is fitted out with Power Down function to decrease the consumption. During this sleep state the device displays a short circuit output in order to keep the impedance matching with the line. The TS615 is housed in TSSOP14 Exposed-Pad plastic package for a very low thermal resistance. APPLICATION ORDER CODE
Part Number TS615IPWT Temperature Range -40, +85C Package PW
PW= Thin Shrink Small Outline Package with Exposed-Pad (TSSOP Exposed-Pad) only available in Tape & Reel (PWT)
PIN CONNECTIONS (top view)
-VCC1 1 Output1 2 +VCC1 3 +-+
14 -VCC2 13 Output2 12 +VCC2 11 Non Inverting Input2 10 Inverting Input2 9 NC 8 NC
Top View
Non Inverting Input1 4 Inverting Input1 5 PowerDown 6 NC 7
Cross Section View Showing Exposed-Pad This pad can be connected to a (-Vcc) copper area on the PCB
s Line driver for xDSL s Multiple Video Line Driver
December 2002
1/27
TS615
ABSOLUTE MAXIMUM RATINGS
Symbol VCC Vid Vin Toper Tstd Tj Rthjc Rthja Pmax. ESD
except pins 4, 5, 10, 11
Parameter Supply voltage 1) Differential Input Voltage 2) Input Voltage Range
3)
Value 7 2 6 -40 to + 85 -65 to +150 150 4 40 3.1 1.5 2 200 1 1 100
4)
Unit V V V C C C C/W C/W W kV kV V kV kV V
Operating Free Air Temperature Range Storage Temperature Maximum Junction Temperature Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient Area Maximum Power Dissipation (@25C) CDM : Charged Device Model HBM : Human Body Model MM : Machine Model CDM : Charged Device Model
ESD
only pins 4, HBM : Human Body Model 5, 10, 11 MM : Machine Model
Output Short Circuit
1. 2. 3. 4. All voltage values, except differential voltage are with respect to network terminal. Differential voltage are non-inverting input terminal with respect to the inverting input terminal. The magnitude of input and output voltage must never exceed VCC +0.3V. An output current limitation protects the circuit from transient currents. Short-circuits can cause excessive heating. Destructive dissipation can result from short circuit on amplifiers.
OPERATING CONDITIONS
Symbol VCC Vicm Power Supply Voltage Common Mode Input Voltage Parameter Value 2.5 to 6 -VCC+1.5V to +VCC-1.5V Unit V V
TYPICAL APPLICATION: Differential Line Driver for xDSL Applications
11 10 12
+ _
+Vcc 13 -Vcc
12.5
1/2TS615
14
Vi
R2
R1 GND R4
Vo 25 Vo
2 12.5
1:2
100
Vi
5 4
_
R3
3 +Vcc -Vcc
1/2TS615
+
6 Pw-Dwn
1
2/27
TS615
ELECTRICAL CHARACTERISTICS VCC = 6Volts, Rfb=910,Tamb = 25C (unless otherwise specified)
Note: as described on page 24 (table 71), the TS615 requires a 620 feedback resistor for an optimised bandwidth with a gain of 12B for a 12V power supply. Nevertheless, due to production test constraints, the TS615 is tested with the same feedback resistor for 12V and 5V power supplies (910).
Symbol DC PERFORMANCE Vio Vio Iib+ IibZIN+ ZINCIN+ CMR SVR
Parameter
Test Condition Tamb Tmin. < Tamb < Tmax. Tamb = 25C Tamb Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax.
Min.
Typ. 1.25 2.1 6 7.8 3 3.2 82 54 1 63 61 79 78 14
Max. 3.5 2.5 30 15
Unit
Input Offset Voltage Differential Input Offset Voltage Positive Input Bias Current Negative Input Bias Current Input(+) Impedance Input(-) Impedance Input(+) Capacitance Common Mode Rejection Ratio 20 log (Vic/Vio) Supply Voltage Rejection Ratio
mV mV A A k pF dB dB
Vic = 4.5V Tmin. < Tamb < Tmax. Vcc=2.5V to 6V
58 72
Tmin. < Tamb < Tmax. 20 log (Vcc/Vio) ICC Total Supply Current per Operator No load DYNAMIC PERFORMANCE and OUTPUT CHARACTERISTIC Vout = 7Vp-p, RL = 25 ROL Open Loop Transimpedance Tmin. < Tamb. < Tmax. Small Signal Vout<20mVp -3dB Bandwidth AV = 12dB, RL = 25 Large Signal Vout=3Vp Full Power Bandwidth BW AV = 12dB, RL = 25 Small Signal Vout<20mVp Gain Flatness @ 0.1dB AV = 12dB, RL = 25 Vout = 6Vp-p, AV = 12dB, RL Tr Rise Time = 25 Vout = 6Vp-p, AV = 12dB, RL Tf Fall Time = 25 Vout = 6Vp-p, AV = 12dB, RL Ts Settling Time = 25 Vout = 6Vp-p, AV = 12dB, RL SR Slew Rate = 25 RL=25 Connected to GND VOH High Level Output Voltage RL=25 Connected to GND VOL Low Level Output Voltage Vout = -4Vp Output Sink Current Tmin. < Tamb < Tmax. Iout Vout = +4Vp Output Source Current Tmin. < Tamb < Tmax.
17
mA M
5
21 8.9 40
25
MHz 26 7 10.6 12.2 50 330 4.8 -350 330 410 5.1 -5.5 -530 -440 420 365 -5.2 MHz ns ns ns V/s V V
mA
3/27
TS615
Note: as described on page 24 (table 71), the TS615 requires a 620 feedback resistor for an optimised bandwidth with a gain of 12B for a 12V power supply. Nevertheless, due to production test constraints, the TS615 is tested with the same feedback resistor for 12V and 5V power supplies (910).
Symbol
Parameter
Test Condition F = 100kHz F = 100kHz F = 100kHz Vout = 14Vp-p, AV = 12dB F= 110kHz, RL = 50 diff. Vout = 14Vp-p, AV = 12dB F= 110kHz, RL = 50 diff. F1= 100kHz, F2 = 110kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1= 370kHz, F2 = 400kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1 = 100kHz, F2 = 110kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1 = 370kHz, F2 = 400kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff.
Min.
Typ. 2.5 15 21 -87 -83 -76
Max.
Unit nV/Hz pA/Hz pA/Hz dBc dBc
NOISE AND DISTORTION eN Equivalent Input Noise Voltage iNp Equivalent Input Noise Current (+) iNn Equivalent Input Noise Current (-) 2nd Harmonic distortion HD2 (differential configuration) HD3 3rd Harmonic distortion (differential configuration)
IM2
2nd Order Intermodulation Product (differential configuration)
dBc -75
-88 dBc -87
IM3
3rd Order Intermodulation Product (differential configuration)
4/27
TS615
ELECTRICAL CHARACTERISTICS VCC = 2.5Volts, Rfb=910,Tamb = 25C (unless otherwise specified)
Symbol DC PERFORMANCE Vio Vio Iib+ IibZIN+ ZINCIN+ CMR SVR ICC Input Offset Voltage Differential Input Offset Voltage Positive Input Bias Current Negative Input Bias Current Input(+) Impedance Input(-) Impedance Input(+) Capacitance Common Mode Rejection Ratio 20 log (Vic/Vio) Supply Voltage Rejection Ratio 20 log (Vcc/Vio) Vic = 1V Tmin. < Tamb. < Tmax. Vcc=2V to 2.5V Tmin. < Tamb. < Tmax. 63 55 Tamb Tmin. < Tamb < Tmax. Tamb = 25C Tamb Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax. 5 8 0.8 1.24 71 62 1.5 60 58 77 76 11.9 2 5.4 2.1 20 30 MHz 20 5.7 11 11.5 39 100 1.5 -350 200 130 1.75 -2.05 -470 -450 270 245 mA -1.8 MHz ns ns ns V/s V V 15 11 0.5 1.2 2.5 30 2.5 mV mV A A k pF dB dB mA Parameter Test Condition Min. Typ. Max. Unit
Total Supply Current per Operator No load DYNAMIC PERFORMANCE and OUTPUT CHARACTERISTICS Vout = 2Vp-p, RL = 10 ROL Open Loop Transimpedance Tmin. < Tamb. < Tmax. -3dB Bandwidth BW Full Power Bandwidth Gain Flatness @ 0.1dB Tr Tf Ts SR VOH VOL Iout Rise Time Fall Time Settling Time Slew Rate High Level Output Voltage Low Level Output Voltage Output Sink Current Output Source Current Small Signal Vout<20mVp AV = 12dB, RL = 10 Large Signal Vout = 1.4Vp AV = 12dB, RL = 10 Small Signal Vout<20mVp AV = 12dB, RL = 10 Vout = 2.8Vp-p, AV = 12dB RL = 10 Vout = 2.8Vp-p, AV = 12dB RL = 10 Vout = 2.2Vp-p, AV = 12dB RL = 10 Vout = 2.2Vp-p, AV = 12dB RL = 10 RL=10 Connected to GND RL=10 Connected to GND Vout = -1.25Vp Tmin. < Tamb < Tmax. Vout = +1.25Vp Tmin. < Tamb < Tmax.
M
5/27
TS615
Symbol
Parameter
Test Condition F = 100kHz F = 100kHz F = 100kHz Vout = 6Vp-p, AV = 12dB F= 110kHz, RL = 20 diff. Vout = 6Vp-p, AV = 12dB F= 110kHz, RL = 20 diff. F1= 100kHz, F2 = 110kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. F1= 370kHz, F2 = 400kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. F1 = 100kHz, F2 = 110kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. F1 = 370kHz, F2 = 400kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff.
Min.
Typ. 2.5 15 21 -97 -98 -86
Max.
Unit nV/Hz pA/Hz pA/Hz dBc dBc
NOISE AND DISTORTION eN Equivalent Input Noise Voltage iNp Equivalent Input Noise Current (+) iNn Equivalent Input Noise Current (-) HD2 HD3 2nd Harmonic distortion (differential configuration) 3rd Harmonic distortion (differential configuration)
IM2
2nd Order Intermodulation Product (differential configuration)
dBc -88
-90 dBc -85
IM3
3rd Order Intermodulation Product (differential configuration)
POWER DOWN MODE FEATURES (The Power Down command is a MOS input featuring a high input impedance) VCC = 2.5Volts, 5Volts, 6Volts or 12Volts, Tamb = 25C
Symbol Parameter Pin (6) Threshold Voltage for Power Down Mode Vpdw Low Level High Level Iccpdw Rpdw Cpdw Power Down Mode Total Current Consumption@ VCC=5V Power Down Mode Total Current Consumption@ VCC=12V Power Down Mode Output Impedance @ VCC=5V Power Down Mode Output Impedance @ VCC=12V Power Down Mode Output Capacitance POWER DOWN CONTROL Vpdw=Low Level Vpdw=High Level Active Standby -VCC -VCC+2 69 148 19 15.3 63 CIRCUIT STATUS -VCC+0.8 +VCC 80 180 23 19 A A pF V Min. Typ. Max. Unit
6/27
TS615
Figure 1 : Load Configuration
Load: RL=25, VCC=6V
Figure 4 : Load Configuration
Load: RL=10, VCC=2.5V
+
_
+6V
50 cable 49.9
+
50
+2.5V
50 cable
TS615
-6V
25
33 1W
TS615
10
49.9
_
-2.5V
11 0.5W
50
Figure 2 : Closed Loop Gain vs. Frequency
AV=+1
2 40
Figure 5 : Closed Loop Gain vs. Frequency
AV=-1
2 -140
gain
0 -2 -4
(Vcc=6V) 20 0
gain
-160 (Vcc=2.5V) 0 -2 -4
phase
(Vcc=2.5V)
phase
(Vcc=6V)
-180 -200 -220
(gain (dB)
Phase ()
-6 -8 -10 -12 -14 -16
(Vcc=2.5V) -40 (Vcc=6V) -60 -80 (Vcc=2.5V, Rfb=1.1k, Rload=10) (Vcc=6V, Rfb=750, Rload=25) -100 -120 100 1k 10k 100k 1M 10M 100M
-6 -8 -10 -12 -14 -16
(Vcc=2.5V) (Vcc=6V)
-240 -260 (Vcc=2.5V, Rfb=1k, Rin=1k, Rload=10) (Vcc=6V, Rfb=680, Rin=680, Rload=25) -280 -300 100 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Frequency (Hz)
Figure 3 : Closed Loop Gain vs. Frequency
AV=+2
8 40
Figure 6 : Closed Loop Gain vs. Frequency
AV=-2
8 -140
gain
6 4 2
(Vcc=6V) 20
gain
6 4 2 -160
phase
(Vcc=2.5V) 0
phase
(Vcc=2.5V) (Vcc=6V) -180 -200 -220 (Vcc=6V) -240 -260
(gain (dB))
Phase ()
0 -2 -4 -6 -8 -10
(Vcc=2.5V) (Vcc=6V)
0 -2 -4 -6 -8 -10
(Vcc=2.5V)
-40 -60 -80 -100 -120 100 1k 10k 100k 1M 10M 100M
(Vcc=2.5V, Rfb=1k, Rin=510, Rload=10) (Vcc=6V, Rfb=680, Rin=750//620, Rload=25)
-280 -300
100
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
7/27
Phase ()
-20
(gain (dB))
Phase ()
-20
(gain (dB))
TS615
Figure 7 : Closed Loop Gain vs. Frequency
AV=+4
14 40
Figure 10 : Closed Loop Gain vs. Frequency
AV=-4
14 -140
gain
12 (Vcc=2.5V) 10 8 20
12 10
gain
-160 (Vcc=2.5V)
phase
(Vcc=6V)
0
8
phase
(Vcc=6V)
-180 -200 -220
(gain (dB))
Phase ()
6 4 2 0 -2 -4
(Vcc=2.5V) (Vcc=6V)
6 4 2 0 -2
(Vcc=2.5V) (Vcc=6V)
-40 -60 -80 (Vcc=2.5V, Rfb=910, Rg=300, Rload=10) (Vcc=6V, Rfb=620, Rg=560//330, Rload=25) -100
-240 -260 (Vcc=2.5V, Rfb=1k, Rin=320//360, Rload=10) (Vcc=6V, Rfb=620, Rin=360//270, Rload=25) -280 -300 100 1k 10k 100k 1M 10M 100M
-4
-120 100 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Frequency (Hz)
Figure 8 : Closed Loop Gain vs. Frequency
AV=+8
20 40
Figure 11 : Closed Loop Gain vs. Frequency
AV=-8
20 -140
gain
18 (Vcc=2.5V) 16 14 20 18 16 0 14
gain
-160 (Vcc=2.5V)
phase
(Vcc=6V)
phase
(Vcc=6V)
-180 -200 -220
(gain (dB))
Phase ()
12 10 8 6 4 2
(Vcc=2.5V) (Vcc=6V)
12 10 8 6 4
(Vcc=2.5V) (Vcc=6V)
-40 -60 -80 (Vcc=2.5V, Rfb=680, Rg=240//160, Rload=10) (Vcc=6V, Rfb=510, Rg=270//100, Rload=25) -100
-240 -260 (Vcc=2.5V, Rfb=680, Rin=160//180, Rload=10) (Vcc=6V, Rfb=510, Rin=150//110, Rload=25) -280 -300 100 1k 10k 100k 1M 10M 100M
2 -120 100 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Frequency (Hz)
Figure 9 : Bandwidth vs. Temperature
AV=+4, Rfb=910
50 Vcc=6V Load=25 45
Figure 12 : Positive Slew Rate
AV=+4, Rfb=620, VCC=6V, RL=25
4
2
40
Bw (MHz)
VOUT (V)
35
0
30
-2
25
Vcc=2.5V Load=10
20 -40
-20
0
20
40
60
80
-4 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
Temperature (C)
Time (s)
8/27
Phase ()
-20
(gain (dB))
Phase ()
-20
(gain (dB))
TS615
Figure 13 : Positive Slew Rate
AV=+4, Rfb=910, VCC=2.5V, RL=10
2
Figure 16 : Positive Slew Rate
AV= - 4, Rfb=620, VCC=6V, R L=25
4
1
2
VOUT (V)
VOUT (V)
0
0
-1
-2
-2 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
-4 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
Time (s)
Time (s)
Figure 14 : Negative Slew Rate
AV=+4, Rfb=620, VCC=6V, RL=25
4
Figure 17 : Positive Slew Rate
AV= - 4, Rfb=910, VCC=2.5V, RL=10
2
2
1
VOUT (V)
0
VOUT (V)
10.0n 20.0n 30.0n 40.0n 50.0n
0
-2
-1
-4 0.0
-2 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
Time (s)
Time (s)
Figure 15 : Negative Slew Rate
AV=+4, Rfb=910, VCC=2.5V, RL=10
2
Figure 18 : Negative Slew Rate
AV= - 4, Rfb=620, VCC=6V, RL=25
4
1
2
VOUT (V)
0
VOUT (V)
10.0n 20.0n 30.0n 40.0n 50.0n
0
-1
-2
-2 0.0
-4 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
Time (s)
Time (s)
9/27
TS615
Figure 19 : Negative Slew Rate
AV= - 4, Rfb=910, VCC=2.5V, RL=10
2
Figure 22 : Input Voltage Noise Level
AV=+92, Rfb=910, Input+ connected to Gnd via 10
5.0
+
Input Voltage Noise (nV/Hz)
4.5
+ 6V - 6V 910 910
Output
_
10
4.0
VOUT (V)
0
3.5
3.0
2.5
-2 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
2.0 100
1k
10k
100k
1M
Time (s)
(Frequency (Hz)
Figure 20 : Slew Rate vs. Temperature
AV=+4, Rfb=910, VCC=2.5V, RL=10
Figure 23 : Transimpedance vs. Temperature
Open Loop
30
200 150 100
25 Vcc=6V
Positive SR
Slew Rate (V/s)
20
0 - 50
Negative SR
ROL (M)
50
15
10 Vcc=2.5V
- 100 - 150 - 200 - 40
5
- 20
0
20
40
60
80
Temperature (C)
0 -40
-20
0
20
40
60
80
Temperature (C)
Figure 21 : Slew Rate vs. Temperature
AV=+4, Rfb=910, VCC=6V, RL=25
Figure 24 : Icc vs. Power Supply
Open loop, no load
16
600 500 400 300
14 12 10 8 6 4 Icc(+)
Slew Rate (V/s)
200 100 0 - 100 - 200 - 300 - 400 - 500 - 600 - 40 - 20 0 20 40 60 80
ICC (mA)
Positive&Negative SR Rfb=620
Positive&Negative SR Rfb=910
2 0 -2 -4 -6 -8 -10 -12 -14 -16 5 6 7 8 9 10 11 12 Icc(-)
Temperature (C)
VCC (V)
10/27
TS615
Figure 25 : Iib vs. Power Supply
Open loop, no load
7
Figure 28 : Iib(+) vs. Temperature
Open loop, no load
8
6
IB+
7 6 5
Vcc=6V
5
IB (A)
4
IIB(+) (A)
IB -
4 3 2 Vcc=2.5V 1 0
3
2
1
0 5 6 7 8 9 10 11 12
-1 -40
-20
0
20
40
60
80
Vcc (V)
Temperature (C)
Figure 26 : Iib(-) vs. Temperature
Open loop, no load
5
Figure 29 : Voh & Vol vs. Power Supply
Open loop, RL=25
6 5 4
VOH
4 Vcc=6V
3 2 1 0 -1 -2 -3
3
IIB(-) (A)
VOH & VOL (V)
VOL
2 Vcc=2.5V 1
-4 -5
0 -40
-6
-20
0
20
40
60
80
5
6
7
8
9
10
11
12
Temperature (C)
Vcc (V)
Figure 27 : Icc vs. Temperature
Open loop, no load
Figure 30 : Voh vs. Temperature
Open loop
6
14 12 10 8 6 4 Icc(+) for Vcc=6V Icc(+) for Vcc=2.5V
5
4
ICC (mA)
VOH (V)
2 0 -2 -4 -6 -8 -10 -12 -14 -40 -20 0 20 40 60 80 Icc(-) for Vcc=6V Icc(-) for Vcc=2.5V
Vcc=6vV Load=25 3
2
1 Vcc=2.5V Load=10 0 -40 -20 0 20 40 60 80
Temperature (C)
Temperature (C)
11/27
TS615
Figure 31 : Vol vs. Temperature
Open loop
0 Vcc=2.5V Load=10
Figure 34 : CMR vs. Temperature
Open loop, no load
70 68 66 Vcc=6V
-1
-2
64
-3
CMR (dB)
VOL (V)
62 60 58 56 54 52 Vcc=2.5V
-4
Vcc=6V Load=25
-5
-6 -40
-20
0
20
40
60
80
50 -40
-20
0
20
40
60
80
Temperature (C)
Temperature (C)
Figure 32 : Differential Vio vs. Temperature
Open loop, no load
450
Figure 35 : SVR vs. Temperature
Open loop, no load
84
400 Vcc=2.5V
82
Vcc=6V
VIO (V)
SVR (dB)
Vcc=6V
350
80
300
78
250
76
200 -40
Vcc=2.5V
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
Temperature (C)
Temperature (C)
Figure 33 : Vio vs. Temperature
Open loop, no load
2.0 Vcc=6V 1.5
Figure 36 : Iout vs. Temperature
Open loop, VCC=6V, RL=10
300 250 200 150 100 50
Isource
Iout (mA)
VIO (mV)
1.0
0 -50 -100 -150 -200 -250
0.5
Isink
0.0 Vcc=2.5V -0.5 -40
-300 -350 -400 40 60 80 -450 -40 -20 0 20 40 60 80
-20
0
20
Temperature (C)
Temperature (C)
12/27
TS615
Figure 37 : Iout vs. Temperature
Open loop, VCC=2.5V, RL=25
300 250 200 150 100 50
600
Figure 40 : Isource vs. Output Amplitude.
VCC=2.5V, Open Loop, no Load
700
Isource
Iout (mA)
0 -50 -100 -150 -200 -250 -300 -350 -400 -450 -40 -20 0 20 40 60 80
Isource (mA)
500
400
300
Isink
200
100
0 0.0
0.5
1.0
1.5
2.0
2.5
Temperature (C)
Vout (V)
Figure 38 : Maximum Output Amplitude vs. Load
AV=+4, Rfb=620, VCC=6V
12
Figure 41 : Isink vs. Output Amplitude
VCC=6V, Open Loop, no Load
0
10
Vcc=6V
-100
-200
VOUT-MAX (VP-P)
8
Isink (mA)
Vcc=2.5V
-300
6
-400
4
-500
2
-600
0 0 50 100 150 200
-700 -6 -5 -4 -3 -2 -1 0
RLOAD ()
Vout (V)
Figure 39 : Isink vs. Output Amplitude.
VCC=2.5V, Open Loop, no Load
0
Figure 42 : Isource vs. Output Amplitude
VCC=6V, Open Loop, no Load
700
-100
600
Isource (mA)
-200
500
Isink (mA)
-300
400
-400
300
-500
200
-600
100
-700 -2.5
0 -2.0 -1.5 -1.0 -0.5 0.0 0 1 2 3 4 5 6
Vout (V)
Vout (V)
13/27
TS615
Figure 43 : Icc (Power Down) vs. Temperature
No load, Open Loop
200 150 100 50 Vcc=6V 0 Vcc=2.5V -50
Figure 44 : Group Delay
VCC=6V, VCC=2.5V
100 90 80 70
ICC pdw (A)
Delay (ns)
Av=4 Vcc=6V, Rfb=620, Load=25 Vcc=2.5V, Rfb=910, Load=10 IF Bw = 10Hz Smoothing=19.247MHz on 10ns/div scale
60 50 40
-100 30 -150 -200 -40 20 10
-20
0
20
40
60
80
300k
1M
10M
50M
Temperature (C)
Frequency (Hz)
14/27
TS615
INTERMODULATION DISTORTION PRODUCT A non-ideal output of the amplifier can be described by the following development :
2 n Vout = C 0 + C 1 V in + C 2 V in + ...C n V in
In this expression, we recognize the second order intermodulation IM2 by the frequencies (1-2) and (1+2) and the third order intermodulation IM3 by the frequencies (21-2), (21+2), (-1+22) and (1+22). The measurement of the intermodulation product of the driver is achieved by using the driver as a mixer by a summing amplifier configuration. By this way, the non-linearity problem of an external mixing device is avoided. Figure 45 : Non-inverting Summing Amplifier
due to a non-linearity in the input-output amplitude transfer. In the case of the input is Vin=Asint, C0 is the DC component, C1(Vin) is the fundamental, Cn is the amplitude of the harmonics of the output signal Vout. A one-frequency (one-tone) input signal contributes to a harmonic distortion. A two-tones input signal contributes to a harmonic distortion and intermodulation product. This intermodulation product or intermodulation distortion study of a two-tones input signal is the first step of the amplifier characterization of driving capability in the case of a multi-tone signal. In this case :
+ C ( A sin t + B sin t ) 2 1 2 2 n
1k
49.9 Vin1
1k
11 10
+ _
+Vcc 13
49.9
1/2TS615
1:2
50
No rth Hills 0 315PB
49.9 400
Rfb1
Vin2
Rg1
33 Vout diff. 100 33
Rfb2
2:1
50
North Hills 0315PB
1:2
50
No rth Hills 0 315PB
400
Rg2
49.9
_
49.9
1/2TS615
+
... + C ( A sin t + B sin t ) n 1 2 V in = A sin t + B sin t 2 1
1k 1k
-Vcc
49.9
V o ut = C 0 + C 1 ( A sin 1 t + B sin 2 t )
and :
+ C1 ( A sin 1 t + B sin 2 t ) C2 2 2 - ------- A cos 2 1 t + B cos 2 2 t 2 + 2 C2 AB ( cos ( 1 - 2 )t - cos ( 1 - 2 ) t ) C 3 + 3 ------- 4 3 3 + C A sin 3 t + B sin 3 t 1 2 3 2 3C A B 3 1 + ----------------------- sin ( 2 1 - 2 )t - -- sin ( 2 1 + )t 2 2 2 2 3C 3 A B 1 + ----------------------- sin ( - + 2 ) t - -- sin ( 1 + 2 )t 1 2 2 22 ... + C n ( V in ) n
The following graphs show the IM2 and the IM3 of the amplifier in different configuration. The two-tones input signal is achieved by the multisource generator Marconi 2026. Each tone has the same amplitude. The measurement is achieved by the spectrum analyzer HP3585A.
A 2 + B2 V out = C 0 + C 2 -------------------- 2 A 3 sin t + B 3 sin t + 2A2 B sin t + 2AB 2 sin t 2 1 2 1
15/27
TS615
Figure 46 : Intermodulation vs. Output Amplitude
370kHz & 400kHz, AV=+1.5, Rfb=1k, RL=14 diff.,VCC=2.5V
Figure 49 : Intermodulation vs. Load
370kHz & 400kHz, AV=+1.5, Rfb=1k, Vout=6.5Vpp,V CC=2.5V
-30
-30 -40 -50 IM3 340kHz, 430kHz, 1140kHz, 1170kHz
-40
IM2 and IM3 (dBc)
-50 IM2 770kHz IM3 340kHz, 430kHz IM2 30kHz
IM2 and IM3 (dBc)
-60 -70 -80 -90
-60
IM2 30kHz
IM2 770kHz
-70
-80
-90
IM3 1140kHz, 1170kHz 0 1 2 3 4 5 6 7 8
-100 -110 0 20 40 60 80 100 120 140 160 180 200
-100
Differential Output Voltage (Vp-p)
Differential Load ()
Figure 47 : Intermodulation vs. Output Amplitude
370kHz & 400kHz, AV=+1.5, Rfb=1k, RL=28 diff.,VCC=2.5V
-30
Figure 50 : Intermodulation vs. Output Amplitude
100kHz & 110kHz, AV=+4, Rfb=620, RL=200 diff.,VCC=6V
-30 -40 -50 IM3 90kHz, 120kHz IM3 310kHz IM3 320kHz
-40
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
-50
-60 -70 -80 -90 -100 -110
IM2 210kHz
-60 IM3 340kHz, 430kHz IM2 30kHz
IM2 770kHz
-70
-80
-90
IM3 1140kHz, 1170kHz 0 1 2 3 4 5 6 7 8
-100
2
4
6
8
10
12
14
16
18
20
22
Differential Output Voltage (Vp-p)
Differential Output Voltage (Vp-p)
Figure 48 : Intermodulation vs. Gain
370kHz & 400kHz, RL=20 diff., Vout=6Vpp, VCC=2.5V
Figure 51 : Intermodulation vs. Output Amplitude
100kHz & 110kHz, AV=+4, Rfb=620, RL=50 diff., VCC=6V
-30 -40 -50 IM3 340kHz, 430kHz, 1140kHz, 1170kHz
-30 -40 -50 IM3 90kHz, 120kHz, 310kHz, 320kHz
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
-60 -70 -80 -90 -100 -110 1.0
IM2 30kHz
-60 -70 -80 -90 -100 -110
IM2 210kHz
IM2 770kHz
1.5
2.0
2.5
3.0
3.5
4.0
2
4
6
8
10
12
14
16
18
20
22
Closed Loop Gain (Linear)
Differential Output Voltage (Vp-p)
16/27
TS615
Figure 52 : Intermodulation vs. Frequency Range
AV=+4, Rfb=620, RL=50 diff., Vout=16Vpp, VCC=6V
Figure 54 : Intermodulation vs. Output Amplitude
370kHz & 400kHz, AV=+4, Rfb=620, RL=50 diff., VCC=6V
-60 -65 -70 -75 f1=100kHz f2=110kHz f1=200kHz f2=230kHz f1=400kHz f2=430kHz
-30
Quadratic Summation of all IM2 and IM3 components generated by each two-tones signal
-40 -50 IM3 1140kHz, 1170kHz IM3 340kHz, 430kHz
IM2 30kHz IM2 770kHz
IM2 and IM3 (dBc)
f1=1MHz f2=1.1MHz
-60 -70 -80 -90 -100 -110
(dB)
-80 -85 -90 -95 -100 100k
200k
300k
400k
500k
600k
700k
800k
900k
1M
1.1M 1M
0
2
4
6
8
10
12
14
16
18
20
22
Frequency (Hz)
Differential Output Voltage (Vp-p)
Figure 53 : Intermodulation vs. Output Amplitude
370kHz & 400kHz, AV=+4, Rfb=620, RL=200 diff.,VCC=6V
-30 -40 -50 IM2 770kHz
IM2 and IM3 (dBc)
IM2 30kHz IM3 1140kHz, 1170kHz
-60 -70 -80 -90 -100 -110 0 2 4 6 IM3 340kHz, 430kHz
8
10
12
14
16
18
20
22
Differential Output Voltage (Vp-p)
17/27
TS615
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS In this range of frequency, printed circuit board parasites can affect the closed-loop performance. The implementation of a proper ground plane in both sides of the PCB is mandatory to provide low inductance and low resistance common return. Most important for controlling the gain flatness and the bandwidth are stray capacitances at the output and inverting input. For minimizing the coupling, the space between signal lines and ground plane will be increased. Connections of the feedback components must be as short as possible in order to decrease the associated inductance which affect high frequency gain errors. It is very important to choose external components as small as possible such as surface mounted devices, SMD, in order to minimize the size of all the DC and AC connections. THERMAL INFORMATION The TS615 is housed in an Exposed-Pad plastic package. As described on the figure 56, this package uses a lead frame upon which the dice is mounted. This lead frame is exposed as a thermal pad on the underside of the package. The thermal contact is direct with the dice. This thermal path provide an excellent thermal performance. The thermal pad is electrically isolated from all pins in the package. It should be soldered to a copper area of the PCB underneath the package. Through these thermal paths within this copper area, heat can be conducted away from the package. In this case, the copper area should be connected to (-VCC). Figure 55 : Exposed-Pad Package
1
DICE
Side View
Bottom View
DICE
Cross Section View
Figure 56 : Evaluation Board
18/27
TS615
Figure 57 : Schematic Diagram
J105
R101
Non-Inverting Amplifier
R106 J106 R107 R102 4
+
J106 R102
R107
4
+
1/2TS615
5
_
2 R116 R114
R118 R120
J110
1/2TS615
5
_
2 R116 R114
R118 R120
J110
R103
J107
R108 R115 10
_
R112
R111
Inverting Amplifier
R115 13 R117 R119 R121 J111 J108 R104 R109 10
_
J108 R104
R109
1/2TS615
+
R111
11
1/2TS615
13 R117
R119 R121
J111
11
+
J109 R105
R110 R113
Differential Amplifier
J106 R102 R107 4
+
1/2TS615
5
_
2 R116 R114
R118 R120
J110
Non-Inverting Summing Amplifier
R101
R111
R112
J105
R106 4
+
R115 10
_
J106 R102
R107
R113
1/2TS615
5
_
2 R116 R114
R118 R120
J110
1/2TS615
13 R117
R119 R121
J111
11
+
J109 R105
R110 R113
Power Supply
+Vcc C105 100nF 100uF C102 C101 +Vcc 100nF 3 4 5
+
Power down J112
Differential Amplifier
-Vcc J106 R102 R107 4
+
R111
R122
1/2TS615
5
_
2 R116 R114
R118 R120
J110
J101 +Vcc J102 GND J103 -Vcc 100nF C103 100uF C104
6 2 1 R111
1/2TS615
_
C106
-Vcc
-Vcc
-Vcc +Vcc C107
Exposed-Pad
100nF
R112
R115 10
_
+Vcc 100nF 1 J104 2 3 11 -Vcc 100nF -Vcc 10
_
1/2TS615
13 R117
R119 R121
J111
11 12 13 J109 R105 R110 R113
+
1/2TS615
+
14
C108
19/27
TS615
Figure 58 : Component Locations - Top Side Figure 60 : Top Side Board Layout
Figure 59 : Component Locations - Bottom Side
Figure 61 : Bottom Side Board Layout
20/27
TS615
NOISE MEASUREMENT Figure 62 : Noise Model
2 2 2 2 2 2 2 = eN x g + iNn x R2 + iNp x R3 x g R2 2 R2 2 ... + ------ x 4kTR1 + 4kTR2 + 1 + ------ x 4kTR3, ( eq2 ) R1 R 1 eNo 2
+
R3
iN+
_
TS615 eN
output HP3577 Input noise: 8nV/Hz
The input noise of the instrumentation must be extracted from the measured noise value. The real output noise value of the driver is:
eNo = 2 2 ( Measured ) - ( instrumentation ) , ( eq3 )
N3
iN-
N2
R1
R2
N1
The input noise is called the Equivalent Input Noise as it is not directly measured but it is evaluated from the measurement of the output divided by the closed loop gain (eNo/g). After simplification of the fourth and the fifth term of (eq2) we obtain:
eNo 2 2 2 2 2 2 2 2 = eN x g + iNn x R2 + iNp x R3 x g R2 2 ... + g x 4kTR2 + 1 + ------ x 4kTR3, ( eq4 ) R1
eN : input voltage noise of the amplifier iNn : negative input current noise of the amplifier iNp : positive input current noise of the amplifier The closed loop gain is :
R fb A V = g = 1 + --------R g
Measurement of eN: We assume a short-circuit on the non-inverting input (R3=0). (eq4) comes:
eNo = 2 2 2 2 eN x g + iNn x R2 + g x 4kTR2, ( eq5 )
The six noise sources are :
V2 = iNn x R 2
V5 =
4 kTR2
R2 V1 = eN x 1 + ------ R1 R2 V3 = iNp x R3 x 1 + ------ R1 R2 V4 = - ------ x 4kTR1 R1
In order to easily extract the value of eN, the resistance R2 will be chosen as low as possible. In the other hand, the gain must be large enough. R1=10, R2=910, R3=0, Gain=92 Equivalent Input Noise: 2.57nV/Hz Input Voltage Noise: eN=2.5nV/Hz Measurement of iNn: R3=0 and the output noise equation is still the (eq5). This time the gain must be decreased to decrease the thermal noise contribution. R1=100, R2=910, R3=0, Gain=10.1 Equivalent Input Noise: 3.40nV/Hz Negative Input Current Noise: iNn =21pA/Hz Measurement of iNp: To extract iNp from (eq3), a resistance R3 is connected to the non-inverting input. The value of R3 must be chosen in order to keep its thermal noise contribution as low as possible against the iNp contribution. R1=100, R2=910, R3=100, Gain=10.1 Equivalent Input Noise: 3.93nV/Hz Positive Input Current Noise: iNp=15pA/Hz
Conditions: frequency=100kHz, VCC=2.5V Instrumentation: Spectrum Analyzer HP3585A (input noise of the HP3585A: 8nV/Hz)
R2 V6 = 1 + ------ 4kTR3 R1
Assuming the thermal noise of a resistance R as: with F the specified bandwidth. On 1Hz bandwidth the thermal noise is reduced to
4kTR 4kTR F
k is the Boltzmann's constant equals 1,374.10-23J/K. T is the temperature (K).
to
The output noise eNo is calculated using the Superposition Theorem. But it is not the sum of all noise sources. The output noise is the square root of the sum of the square of each noise source.
eNo = V1 + V2 + V3 + V4 + V5 + V6 ,( eq1 ) 2 2 2 2 2 2
21/27
TS615
POWER SUPPLY BYPASSING A proper power supply bypassing comes very important for optimizing the performance in high frequency range. Bypass capacitors should be placed as close as possible to the IC pins to improve high frequency bypassing. A capacitor greater than 1F is necessary to minimize the distortion. For a better quality bypassing a capacitor of 10nF is added following the same condition of implementation. These bypass capacitors must be incorporated for the negative and the positive supply. Figure 63 : Circuit for Power Supply Bypassing
+VCC + 10nF 10F
necessary to assume a positive output dynamic range between 0V and +VCC supply rails. Considering the values of VOH and VOL, the amplifier will provide an output dynamic from +0.5V to 10.6V on 25 load for a 12V supplying, from 0.45V to 3.8V on 10 load for a 5V supplying. The amplifier must be biased with a mid supply (nominally +VCC/2), in order to maintain the DC component of the signal at this value. Several options are possible to provide this bias supply (such as a virtual ground using an operational amplifier), or a two-resistance divider which is the cheapest solution. A high resistance value is required to limit the current consumption. On the other hand, the current must be high enough to bias the non-inverting input of the amplifier. If we consider this bias current (30A max.) as the 1% of the current through the resistance divider to keep a stable mid supply, two resistances of 2.2k can be used in the case of a 12V power supply and two resistances of 820 can be used in the case of a 5V power supply. The input provides a high pass filter with a break frequency below 10Hz which is necessary to remove the original 0 volt DC component of the input signal, and to fix it at +VCC/2. CHANNEL SEPARATION - CROSSTALK The following figure show the crosstalk from an amplifier to a second amplifier. This phenomenon, accented in high frequencies, is unavoidable and intrinsic of the circuit. Nevertheless, the PCB layout has also an effect on the crosstalk level. Capacitive coupling between signal wires, distance between critical signal nodes, power supply bypassing, are the most significant points. Figure 65 : Crosstalk vs. Frequency
AV=+4, Rfb=620, VCC=6V, Vout=2Vp
+
TS615
-
10nF
10F + -VCC
SINGLE POWER SUPPLY The following figure show the case of a 5V single power supply configuration Figure 64 : Circuit for +5V single supply
+5V 10F IN +5V R1 820 RG
910
+
Rin 1k 1/2 TS615
100F Rs
OUT Rload
_
-50 -60 -70 -80 -90 -100 -110
R2 820
+ 1F 10nF
+
CG
The TS615 operates from 12V down to 5V power supplies. This is achieved with a dual power supply of 6V and 2.5V or a single power supply of 12V and 5V referenced to the ground. In the case of this asymmetrical supplying, a new biasing is
22/27
CrossTalk (dB)
Rfb
-120 -130 10k
100k
1M
10M
Frequency (Hz)
TS615
POWER DOWN MODE BEHAVIOUR Figure 66 : Equivalent Schematic
0
Figure 68 : Standby Mode. Time On>Off
Vcc +
Enabled Output
4
5
_
A1
2 Ouput 1
(Volts)
+
. .
3 1
POWER DOWN pin6
-1
-2
Vout
.. .
-Vcc -Vcc
-3
Rpdw
-4
Disabled Output Vpdw
Vcc Vcc 14 11
-5
-6 0 10 20 30 40 50
+ _ A2
10
. .
.. .
Rpdw
Time (s)
13 Ouput 2
12
Vcc +
POWER DOWN pin6
Figure 69 : Standby Mode. Time Off>On
Please note that the short circuited output in power down mode is referenced to (-VCC). No problem appears when used in differential mode. Nevertheless, when used in single ended on a load referenced to GND, the (-VCC) level contributes to a current consumption through the load. As described on the Figure 68, the interest of featuring an output short circuit in power down mode is to keep the best impedance matching between the system and the twisted pair telephone line when the modem is in sleep mode. By this way, the modem can be waked-up with a signal from the line without any damage of this signal. This concept is particularly intended for the ADSL over voice modems, where the modem in sleep mode, must be waked-up by the phone call. Figure 67 : Matching in Sleep Mode
1
Vout
0
Disabled Output
- 1
(Volts)
Enabled Output
- 2 - 3 - 4 - 5 - 6 0 1 2 3 4 5
Vpdw
Time (s)
Figure 70 : Standby Mode. Input/Output Isolation vs. Frequency
AV=+4, Rfb=620, VCC=6V, Vout=3Vp
0 -10
Consumption=80A
Matching 12.5 Transformer
-20 -30
Isolation (dB)
TS615
1:2
5 max. 12.5 25
-40 -50 -60 -70 -80 -90 -100 -110
Line (100)
POWER DOWN
The system can be waked-up from the line
-120 -130 10k 100k 1M 10M
Frequency (Hz)
23/27
TS615
CHOICE OF THE FEEDBACK CIRCUIT Table 71 : Closed-Loop Gain - Feedback Components
VCC (V) Gain +1 +2 +4 +8 -1 -2 -4 -8 +1 +2 +4 +8 -1 -2 -4 -8 Rfb () 750 680 620 510 680 680 620 510 1.1k 1k 910 680 1k 1k 910 680
R1 IN R2 C2 TS615
ACTIVE FILTERING Figure 73 : Low-Pass Active Filtering. Sallen-Key
C1
+
OUT
6
_
25
RG
Rfb 910
2.5
INVERTING AMPLIFIER BIASING In this case a resistance is necessary to achieve a good input biasing, as R on (fig.30). This resistance is calculated by assuming the negative and positive input bias current. The aim is to make the compensation of the offset bias current which could affect the input offset voltage and the output DC component. Assuming Ib-, Ib+, Rin, Rfb and a zero volt output, the resistance R comes: R = Rin // Rfb . Figure 72 : Compensation of the Input Bias Current
Rfb Ib-
The resistors Rfb and RG give directly the gain of the filter as a classical non-inverting amplification configuration :
R fb A V = g = 1 + --------Rg
Assuming the following expression as the response of the system:
Vout j g T j = ------------------- = --------------------------------------------Vinj 2 j ( j ) 1 + 2 ------ + ------------2 c c
Rin
_
Vcc+ Output TS615
the cutoff frequency is not gain dependent and it comes:
1 c = ------------------------------------R1R2C 1C2
+
Ib+ R Vcc-
Load
the damping factor comes:
1 = -- c ( C1 R 1 + C1 R 2 + C2 R 1 - C1 R 1 g ) 2
The higher the gain the more sensitive the damping factor is. When the gain is higher than 1 it is preferable to use some very stable resistors and capacitors values.
In the case of R1=R2:
Rfb 2C - C --------2 1R g = ----------------------------------2 C 1 C2
24/27
TS615
INCREASING THE LINE LEVEL BY USING AN ACTIVE IMPEDANCE MATCHING With a passive matching, the output signal amplitude of the driver must be twice the amplitude on the load. To go beyond this limitation an active matching impedance can be used. With this technique, it is possible to keep a good impedance matching with an amplitude on the load higher than the half of the output driver amplitude. This concept is shown in figure 74 for a differential line. Figure 74 : TS615 as a differential line driver with an active impedance matching
2Vi ( Vi - Vo ) ( Vi + Vo ) -------- , -------------------------- and -----------------------R1 R2 R3
As Vo equals Vo without load, the gain in this case becomes :
2R2 R2 1 + ----------- + ------Vo ( noload ) R1 R3 G = -------------------------------- = -----------------------------------Vi R2 1 - ------R3
The gain, for the loaded system will be (eq1):
2 R2 R2 1 + ----------- + ------Vo ( with load ) 1 R1 R3 GL = ------------------------------------- = -- ------------------------------------ ,( eq1 ) Vi 2 R2 1 - ------R3
1 100n + Vcc+ 1k _ Vcc+ GND Rs1 10n
Vi
1/2 R1
R2
Vo Vo
1:n
Hybrid & Transformer
R3 Vcc/2
RL Vo
100
1/2 R1
R5
Vi
1k
10
100n
As shown in figure76, this system is an ideal generator with a synthesized impedance as the internal impedance of the system. From this, the output voltage becomes:
Vo = ( ViG ) - ( RoIout ) ,( eq2 )
GND
+ _
R4 Vcc+
GND
Vo
Rs2
100n
with Ro the synthesized impedance and Iout the output current. On the other hand Vo can be expressed as: Component Calculation Let us consider the equivalent circuit for a single ended configuration, Figure75. Figure 75 : Single ended equivalent circuit
2R2 R2 Vi 1 + ----------- + ------- R1 R3 Rs1Iout Vo = ----------------------------------------------- - ---------------------- ,( eq3 ) R2 R2 1 - ------1 - ------R3 R3
+
Rs1 Vi
By identification of both equations (eq2) and (eq3), the synthesized impedance is, with Rs1=Rs2=Rs:
Rs Ro = ---------------- ,( eq4 ) R2 1 - ------R3
_
R2
Vo Vo
-1
R3 1/2R1 1/2RL
Figure 76 : Equivalent schematic. Ro is the synthesized impedance
Ro Iout
Vi.Gi
1/2RL
Let us consider the unloaded system. Assuming the currents through R1, R2 and R3 as respectively:
25/27
TS615
Unlike the level Vo required for a passive impedance, Vo will be smaller than 2Vo in our case. Let us write Vo=kVo with k the matching factor varying between 1 and 2. Assuming that the current through R3 is negligible, it comes the following resistance divider:
kV oRL Ro = ----------------------------RL + 2R s1
By fixing an arbitrary value of R2, (eq6) gives:
R2 R3 = -------------------2Rs 1 - ---------RL
Finally, the values of R2 and R3 allow us to extract R1 from (eq1), and it comes:
2R2 R1 = ---------------------------------------------------------- ,( eq7 ) 1 - R2 GL - 1 - R2 2 ------------ R3 R3
After choosing the k factor, Rs will equal to 1/2RL(k-1). A good impedance matching assumes:
1 R o = -- RL ,( eq5 ) 2
with GL the required gain. Figure 77 : Components Calculation for Impedance Matching Implementation
GL (gain for the loaded system) GL is fixed for the application requirements GL=Vo/Vi=0.5(1+2R2/R1+R2/R3)/(1-R2/R3) 2R2/[2(1-R2/R3)GL-1-R2/R3] Abritrary fixed R2/(1-Rs/0.5RL) 0.5RL(k-1) kRL/2
From (eq4) and (eq5) it becomes:
R2 2Rs ------- = 1 - ---------- ,( eq6 ) R3 RL
R1 R2 (=R4) R3 (=R5) Rs Load viewed by each driver
26/27
TS615
PACKAGE MECHANICAL DATA 14 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP Exposed-Pad)
c
k 0,25 mm GAUGE PLANE
L
SEATING PLANE
C
E E2 A2
L1
E1
A A1
8
9
e
D1
D
b aaa C
1
14
PIN 1 IDENTIFICATION
Millimeters Dimensions Min. A A1 A2 b c D D1 E E1 E2 e L L1 k aaa Typ. Max. 1.200 0.150 1.050 0.300 0.200 5.100 6.600 4.500 Min.
Inches Typ. Max. 0.047 0.006 0.041 0.012 0.008 0.201 0.260 0.177
0.800 0.190 0.090 4.900 6.200 4.300
1.000
0.450 0d
5.000 3.000 6.400 4.400 3.000 0.650 0.600 1.000
0.031 0.007 0.004 0.193 0.244 0.169
0.039
0.750 8d 0.100
0.018 0d
0.197 1.18 0.252 0.173 1.18 0.026 0.024 0.039
0.030 8d 0.004
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com
27/27


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